Half Price Standard Code

METHOD FOR CHARACTERIZING THE ELECTROMIGRATION FAILURE TIME DISTRIBUTION OF INTERCONNECTS UNDER CONSTANT-CURRENT AND TEMPERATURE STRESS
standard by JEDEC Solid State Technology Association, 03/01/2006

DDR2 SPD INTERPRETATION OF TEMPERATURE RANGE AND (SELF-) REFRESH OPERATION
standard by JEDEC Solid State Technology Association, 06/01/2006

SILICON RECTIFIER DIODES
standard by JEDEC Solid State Technology Association, 11/01/2002

STANDARD FOR DESCRIPTION OF FAST CMOS TTL COMPATIBLE LOGIC
standard by JEDEC Solid State Technology Association, 01/01/1993

BOARD LEVEL CYCLIC BEND TEST METHOD FOR INTERCONNECT RELIABILITY CHARACTERIZATION OF COMPONENTS FOR HANDHELD ELECTRONIC PRODUCTS
standard by JEDEC Solid State Technology Association, 03/01/2006

Multi-wire Multi-level I/O Standard
standard by JEDEC Solid State Technology Association, 06/01/2016

STANDARD TEST LOADS FOR DUAL-SUPPLY LEVEL TRANSLATION DEVICES
standard by JEDEC Solid State Technology Association, 11/01/2005

TEST METHOD FOR THE MEASUREMENT OF MOISTURE DIFFUSIVITY AND WATER SOLUBILITY IN ORGANIC MATERIALS USED IN ELECTRONIC DEVICES
standard by JEDEC Solid State Technology Association, 07/01/2014

Universal Flash Storage (UFS) Host Controller Interface
standard by JEDEC Solid State Technology Association, 08/01/2011

THERMAL TEST BOARD STANDARDS TO ACCOMMODATE MULTI-CHIP PACKAGES
standard by JEDEC Solid State Technology Association, 12/01/2010